Communications Archives - Hardware Descriptions

Ethernet vol 4 : TXing

1 Comment / Ethernet, FIFO control, RGMII, VHDL / johonkanen

Complete sources from github are found at /ac_inout_psu/source/system_control/system_components/ethernet_communication/ethernet/ethernet_frame_transmitter/ So far the journey to ethernet has gone though the physical cable status monitoring with MDIO, frame capturing through RGMII and In the previous blog post, a minimal protocol stack for UDP header parsing designed and it was verified against ethernet connection with a computer. The working […]

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Gigabit ethernet vol 3: processing protocols from Reasonably Accessible Memory

Leave a Comment / ethernet/ip/udp protocol processing, FPGA RAM control, VHDL / johonkanen

See the most current sources in the Github repository at ac_inout_psu/source/system_control/system_components/ethernet/ Memory sources are in -/ethernet/common/dual_port_ethernet_ram/ With the gigabit physical layer receiver completed, next task is to create minimal set of rules, or protocols for connecting the FPGA with the ethernet to a computer network. With most computer operating systems, ethernet is implemented as part

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Ethernet vol2 : a look to the RGMII-connection

Leave a Comment / Ethernet, RGMII, VHDL / johonkanen

Get complete sources from ac_inout_psu/source/system_control/system_components/ethernet/ Now with the link up and running, as indicated by the data accessed through the MDIO, the next thing to do is to catch the ethernet frame from the ethernet cable through phy RGMII connection. RGMII is a 12 io source synchronous interface consisting of separate RX and TX clock

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Gigabit Ethernet vol1 : MDIO and communications wonderland

1 Comment / Ethernet, MDIO, VHDL / johonkanen

Get the complete sources after cloning github repository from ac_inout_psusourcesystem_controlsystem_componentsethernetmdio_driver Gigabit Ethernet is probably the most convenient way to communicate with an embedded system. The link is full duplex, extremely robust even through ridiculously long cables and the cable is even galvanically isolated from both ends. The ethernet port is available on all PC hardware

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Abstract UART in VHDL

Leave a Comment / UART, VHDL / johonkanen

https://github.com/johonkanen/ac_inout_psu/releases/tag/abstract_uart Compile the code with quartus_sh -t <path_to_project_root>cyclone_10tclbuild_project.tcl As with most things, everything usually starts with communication. Since many types of information need to be communicated out of the overall design the the uart is the perfect first design unit to be brought into any project. Uart in this case is also used as an

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