VHDL designs on video

In this page I am collecting videos where I show in practice how the object oriented VHDL code design works. Since any method of coding can do everything the only difference is how the different methods are used to constrain the design. Whether we use data flow, structural, behavioral, object oriented or schematic entry for our designs we can solve any problem with any method. The difference is only how we constrain ourselves with the design pattern of our choice. Uniform design patterns constrain our design method, thus they remove unnecessary decisions from design process and thus simplify our work.

A good design pattern is one that is descriptive enough to fit as many designs as possible. Good patterns promote automation as they can be made into templates and snippets that the source code editor can be used to fill in. I have made videos where I use the best patterns I’ve come across where I use the concept of interfaces and objects.


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